最优化分析使网络电路输出功率最大

用最速上升法分析具有多负载的有源线性网络电路,使其输出功率最大,它可以为电子器件端口的合理布置提供最优数据。     

FEATURE SOLID MODELING TOOL SYSTEM:FSMTS

In conformity with the principle of Design for Manufacture,feature-based design strate-(?)es have been developed.As the“feature”is relevant to the“macro process plan”and“macro NCprograms”,obviously,“feature”is beyond the power of conventional solid modellers.Neverthe-less,substantial breakthrough has not been made in the solid modeling field,except“feature at-taching”or“feature recognizing”methods have been taken on.In this paper,the theory,concepts,system architecture,and algorithm principles of solid modeling tool system have beenrepresented.The practice of Feature Solid Modeling Tool System (FSMTS) developed atHuazhong University has proved that the tool may be a new foundation of Feature-Based Design.     

软土地基地下结构的一个CAD软件

本文介绍地下结构计算机辅助设计软件——UCAD的总体结构、主要功能以及解决的问题。     

一种换热器布管设计程序

针对换热器布管设计中遇到的实际问题,开发了一个内嵌式AutoLISP程序.实际应用证明,AutoLISP程序可以满足工程中大多数布管设计的需求,能较好地解决常用类型管壳式换热器布管设计中遇到的问题.     

现代模具技术及其进展

论述了现代模具种类和学科特点、模具工业特点、模具领域新技术、模具CAD/CAM集成化技术的发展及展望。     

CAD系统中产品设计三维实体建模方法的研究

三维建模是应用CAD系统进行产品设计的重要步骤。现在市场上已有不少的CAD系统，但是不同系统中的三维建模方法却是基本相同的。在这些三维建模的方法中，往往对用户施加了许多的限制，使得用户无法建立复杂的三维实体。笔者提出了一种新的三维建模方法－折叠法，应用这种方法的概念和原理，可以开发出先进的三维建模CAD系统。折叠二维平面图形构成三维实体是作者提出的一种新概念。     

一种简便通用的快速干涉检查算法

提出了一种简便通用的快速干涉检查算法.该算法是在机械CAD中,利用合理排序、简化建模、网格图和离散时间表、运动路径简化等方法从而实现快速干涉检查的一种方法.     

基于OTA的多功能电压模滤波器及其仿真

本文采用信号流图法设计了一种基于ＯＴＡ的三输入一输出多功能电压模滤波器新电路，该电路由五个ＯＴＡ和两个接地电容构成，合理选择输入电压可实现低通、高通、带通、带阻及全通滤波功能。文章还对电路进行了ＭＯＳ管级的计算机仿真，其结果表明所提出的电路方案正确有效。     

计算机辅助设计中浓淡曲线的设计

本文介绍利用Super Frame软件进行色彩浓淡设计的原理、方法和步骤。据此原理和方法,使用C语言设计开发出了应用实例——折线浓淡分布曲线。     

Techniques for estimating test length under random test

When a circuit is tested using random or pseudorandom patterns, it is essential to determine the amount of time (test length) required to test it adequately. We present a methodology for predicting different statistics of random pattern test length. While earlier methods allowed estimation only of upper bounds of test length and only for exhaustive fault coverage, the technique presented here is capable of providing estimates of all statistics of interest (including expected value and variance) for all coverage specifications.Our methodology is based on sampling models developed for fault coverage estimation [1]. Test length is viewed as awaiting time on fault coverage. Based on this relation we derive the distribution of test length as a function of fault coverage. Methods of approximating expected value and variance of test length are presented. Accuracy of these approximations can be controlled by the user. A practical technique for predicting expected test length is developed. This technique is based on clustering faults into equal detectability subsets. A simple and effective algorithm for fault clustering is also presented. The sampling model is applied to each cluster independently and the results are then aggregated to yield test lengths for the whole circuit. Results of experiments with several circuits (both ISCAS '85 benchmarks and other practical circuits) are also provided.This work was done while the author was with the Department of Electrical Engineering, Southern Illinois University, Carbondale, IL 62901.